1. Field of the Invention
The present invention relates to a method for forming a semiconductor device. More particularly, the present invention relates to a method for forming shallow trench isolation (STI) structures.
2. Description of the Related Art
Advances in the production of integrated circuits have led to an increase in the level of integration and the miniaturization of semiconductor devices. As the level of integration increases, both the dimensions of each device and size of the isolating structures between devices are reduced. Consequently, device isolation structures are increasingly harder to form. Device isolation structures such as a field oxide layer formed by local oxidation (LOCOS) is no longer suitable for small dimensional device due to the intensification of bird's beak encroachment problem. Therefore, shallow trench isolation (STI) method has been developed for highly integrated circuits, and sub-half micron integrated circuits in particular.
In general, a shallow trench isolation (STI) structure is formed by performing an anisotropic etching operation using a silicon nitride hard mask to form a steep-sided trench in a semiconductor substrate. Oxide material is deposited into the trench to form an oxide plug. However, the aforementioned method of STI fabrication often results in the formation of recess cavities, resulting in locally intensified electric field. This leads to an abnormal sub-threshold current leakage in the transistor channel, resulting in the intensification of the kink effect. Hence, the transistor can no longer operate normally and reliably.